rev 2.1 ?2010 advanced linear devices, inc. 415 tasman drive, sunnyvale, ca 94089-1706 tel: (408) 747-1155 fax: (408) 747-1286 www.aldinc.com general description the ald1704a/ald1704b/ald1704/ald1704g is a cmos monolithic operational amplifier with mosfet input that has rail-to-rail input and output voltage ranges. the input voltage range and output voltage range are very close to the positive and negative power supply voltages. typically the input voltage can be beyond positive power supply voltage v + , or the negative power supply voltage v- by up to 300mv. the output voltage swings to within 60mv of either positive or negative power supply voltages at rated load. this device is designed as an alternative to the popular jfet input operational amplifiers in applications where lower operating voltages, such as 9v battery or 3.25v to 5v power supplies are being used. it offers high slew rate of 5v/ s at low operating power of 30mw. since the ald1704a/ald1704b/ald1704/ald1704g is designed and manufac- tured with advanced linear devices' standard enhanced acmos silicon gate cmos process, it also offers low unit cost and exceptional reliability. the rail-to-rail input and output feature of the ald1704a/ald1704b/ ald1704/ald1704g allows a lower operating supply voltage for a given signal voltage range and allows numerous analog serial stages to be implemented without losing operating voltage margin. the output stage is designed to drive up to 10ma into 400pf capacitive and 1.5k ? resistive loads at unity gain and up to 4000 pf at a gain of 5. short circuit protection to either ground or the power supply rails is at approximately 15ma clamp current. due to complementary output stage design, the output can both source and sink 10ma into a load with symmetrical drive and is ideally suited for applications where push-pull voltage drive is desired. the offset voltage is trimmed on-chip to eliminate the need for external nulling in many applications. for precision applications, the output is designed to settle to 0.1% in 2 s. for large signal buffer applications, the operational amplifier can function as an ultra high input impedance voltage follower/buffer that allows input and output voltage swings from positive to negative supply voltages. this feature is intended to greatly simplify systems design and eliminate higher voltage power supplies in many applications. additionally, robust design and rigorous screening make this device especially suitable for operation in temperature-ex- treme environments and rugged conditions. rail-to-rail cmos operational amplifier ald1704a/ald1704b ald1704/ald1704g a dvanced l inear d evices, i nc. applications ? voltage amplifier ? voltage follower/buffer ? charge integrator ? photodiode amplifier ? data acquisition systems ? high performance portable instruments ? signal conditioning circuits ? low leakage amplifiers ? active filters ? sample/hold amplifier ? picoammeter ? current to voltage converter ? coaxial cable driver ? capacitive sensor amplifier ? piezoelectric transducer amplifier features ? rail-to-rail input and output voltage ranges ? 5.0v/ s slew rate ? output settles to 2mv of supply rails ? high capacitive load capability -- up to 4000pf ? symmetrical push-pull output drives ? no frequency compensation required -- unity gain stable ? extremely low input bias currents -- 1.0pa typical (20pamax) ? ideal for high source impedance applications ? high voltage gain -- typically 150v/mv ? output short circuit protected ? unity gain bandwidth of 2.1mhz ? suitable for rugged, temperature-extreme environments operating temperature range 0 c to +70 c0 c to +70 c -55 c to 125 c 8-pin 8-pin 8-pin small outline plastic dip cerdip package (soic) package package ald1704asal ald1704apal ald1704ada ald1704bsal ALD1704BPAL ald17041bda ald1704sal ald1704pal ald1704da ald1704gsal ald1704gpal ald1704gda * contact factory for leaded (non-rohs) or extended high/low temperature versions. ordering information (?l? suffix denotes lead-free (rohs)) pin configuration * n/c pins are internally connected. do not connect externally. 1 2 2 3 4 8 7 6 5 n/c -in +in n/c out n/c v - v + top view sal, pal, da packages
ald1704a/ald1704b advanced linear devices 2 of 9 ald1704/ald1704g absolute maximum ratings supply voltage, v + 10.6v differential input voltage range -0.3v to v + +0.3v power dissipation 600 mw operating temperature range sal, pal packages 0 c to +70 c da package -55 c to +125 c storage temperature range -65 c to +150 c lead temperature, 10 seconds +260 c caution: esd sensitive device. use static control procedures in esd controlled environment. operating electrical characteristics t a = 25 c v s = 5.0v unless otherwise specified 1704a 1704b 1704 1704g test parameter symbol min typ max min typ max min typ max min typ max unit conditions supply v s 3.25 5.0 3.25 5.0 3.25 5.0 3.25 5.0 v dual supply voltage v + 6.5 10.0 6.5 10.0 6.5 10.0 6.5 10.0 v single supply input offset v os 0.9 2.0 4.5 10.0 mv r s 100k ? voltage 1.7 2.8 5.3 11.0 mv 0 c t a +70 c input offset i os 1.0 15 1.0 15 1.0 15 1.0 25 pa t a = 25 c current 240 240 240 240 pa 0 c t a +70 c input bias i b 1.0 20 1.0 20 1.0 20 1.0 30 pa t a = 25 c current 300 300 300 300 pa 0 c t a +70 c input voltage v ir -5.3 +5.3 -5.3 +5.3 -5.3 +5.3 5.0 v range input r in 10 12 10 12 10 12 10 12 ? resistance input offset tcv os 5557 v/ cr s 100k ? voltage drift power supply psrr 70 80 65 80 65 80 60 80 db r s 100k ? rejection ratio 0 c t a +70 c common mode cmrr 70 83 65 83 65 83 60 83 db r s 100k ? rejection ratio 0 c t a +70 c large signal a v 50 150 50 150 50 150 32 150 v/ mv r l = 10k ? voltage gain 150 150 150 150 v/ mv no load 40 40 40 20 v/ mv 0 c t a +70 c output v o low -4.96 -4.90 -4.96 -4.90 -4.96 -4.90 -4.96 -4.90 v r l = 10k ? voltage v o high 4.90 4.95 4.90 4.95 4.90 4.95 4.90 4.95 0 c t a +70 c range v o low -4.998 -4.99 -4.998 -4.99 -4.998 -4.99 -4.998 -4.99 v r l =1m ? v o high 4.99 4.998 4.99 4.998 4.99 4.998 4.99 4.998 0 c t a +70 c output short i sc 15 15 15 15 ma circuit current supply current i s 3.0 4.5 3.0 4.5 3.0 4.5 3.0 5.0 ma v in = 0v no load power p d 30 45 30 45 30 45 30 50 mw v s = 5.0 dissipation no load input c in 1111pf capacitance bandwidth b w 2.1 2.1 2.1 2.1 mhz slew rate s r 5.0 5.0 5.0 5.0 v/ sa v = +1 r l = 2.0k ? rise time t r 0.1 0.1 0.1 0.1 sr l = 2.0k ? overshoot 15 15 15 15 % r l = 2.0k ? factor c l = 100pf
ald1704a/ald1704b advanced linear devices 3 of 9 ald1704/ald1704g operating electrical characteristics (cont'd) maximum load c l 400 400 400 400 pf gain = 1 capacitance 4000 4000 4000 4000 pf gain = 5 input noise voltage e n 26 26 26 26 nv/ h z f = 1kh z input current noise i n 0.6 0.6 0.6 0.6 fa/ h z f = 10h z settling t s 5.0 5.0 5.0 5.0 s 0.01% time 2.0 2.0 2.0 2.0 s 0.1% a v = -1 r l = 5k ? c l = 50pf t a = 25 c v s = 5.0v unless otherwise specified 1704a 1704b 1704 1704g parameter symbol min typ max min typ max min typ max min typ max unit test conditions input offset voltage v os 2.0 4.0 7.0 mv r s 100k ? input offset current i os 8.0 8.0 8.0 na input bias current i b 10.0 10.0 10.0 na power supply psrr 60 75 60 75 60 75 db r s 100k ? rejection ratio common mode cmrr 60 83 60 83 60 83 db r s 100k ? rejection ratio large signal a v 30 125 30 125 30 125 v/mv r l = 10k ? voltage gain output voltage v o low -4.9 -4.8 -4.9 -4.8 -4.9 -4.8 v r l = 10k ? range v o high 4.8 4.9 4.8 4.9 4.8 4.9 v r l = 10k ? v s = 5.0v -55 c t a +125 c unless otherwise specified 1704ada 1704bda 1704da parameter symbol min typ max min typ max min typ max unit test conditions
ald1704a/ald1704b advanced linear devices 4 of 9 ald1704/ald1704g typical performance characteristics design & operating notes: 1. the ald1704a/ald1704b/ald1704/ald1704g cmos operational amplifier uses a 3 gain stage architecture and an improved frequency compensation scheme to achieve large voltage gain, high output driving capability, and better frequency stability. the ald1704a/ ald1704b/ald1704/ald1704g is internally compensated for unity gain stability using a novel scheme that produces a clean single pole roll off in the gain characteristics while providing for more than 70 degrees of phase margin at the unity gain frequency. a unity gain buffer using the ald1704a/ald1704b/ald1704/ald1704g will typically drive 400pf of external load capacitance without stability problems. in the inverting unity gain configuration, it can drive up to 800pf of load capacitance. compared to other cmos operational amplifiers, the ald1704a/ald1704b/ald1704/ald1704g has shown itself to be more resistant to parasitic oscillations. 2. the ald1704a/ald1704b/ald1704/ald1704g has complementary p-channel and n-channel input differential stages connected in parallel to accomplish rail to rail input common mode voltage range. this means that with the ranges of common mode input voltage close to the power supplies, one of the two differential stages is switched off internally. to maintain compatibility with other operational amplifiers, this switching point has been selected to be about 1.5v above the negative supply voltage. since offset voltage trimming on the ald1704a/ ald1704b/ald1704/ald1704g is made when the input voltage is symmetrical to the supply voltages, this internal switching does not affect a large variety of applications such as an inverting amplifier or non-inverting amplifier with a gain larger than 2 (10v operation), where the common mode voltage does not make excursions below this switching point. 3. the input bias and offset currents are essentially input protection diode reverse bias leakage currents, and are typically less than 1pa at room temperature. this low input bias current assures that the analog signal from the source will not be distorted by input bias currents. for applications where source impedance is very high, it may be necessary to limit noise and hum pickup through proper shielding. 4. the output stage consists of symmetrical class ab complementary output drivers, capable of driving a low resistance load with up to 10ma source current and 10ma sink current. the output voltage swing is limited by the drain to source on-resistance of the output transistors as determined by the bias circuitry, and the value of the load resistor. when connected in the voltage follower configuration, the oscillation resistant feature, combined with the rail-to-rail input and output feature, makes the ald1704a/ald1704b/ald1704/ald1704g an effective analog signal buffer for medium to high source impedance sensors, transducers, and other circuit networks. 5. the ald1704a/ald1704b/ald1704/ald1704g operational ampli- fier has been designed to provide full static discharge protection. internally, the design has been carefully implemented to minimize latch up. however, care must be exercised when handling the device to avoid strong static fields that may degrade a diode junction, causing increased input leakage currents. in using the operational amplifier, the user is advised to power up the circuit before, or simultaneously with, any input voltages applied and to limit input voltages to not exceed 0.3v of the power supply voltage levels. input bias current as a function of ambient temperature ambient temperature ( c) 1000 100 10 0.1 1.0 input bias current (pa) 100 -25 0 75 125 50 25 -50 v s = 5.0v 10000 common mode input voltage range as a function of supply voltage supply voltage (v) common mode input voltage range (v) 7 6 5 4 3 2 2 3 4 5 6 7 t a = 25 c supply current as a function of supply voltage supply voltage (v) 5 4 3 2 1 0 supply current (ma) 0 1 2 3 4 5 6 +125 c +80 c +25 c t a = -55 c -25 c inputs grounded output unloaded open loop voltage gain as a function of supply voltage and temperature supply voltage (v) 1000 100 10 1 open loop voltage gain (v/mv) 0 2 4 6 r l = 10k ? r l = 5k ? } -55 c } +25 c } +125 c 8
ald1704a/ald1704b advanced linear devices 5 of 9 ald1704/ald1704g typical performance characteristics (cont'd) large - signal transient response v s = 5.0v t a = 25 c r l = 1k ? c l = 50pf 5v/div 5v/div 2 s/div small - signal transient response v s = 5.0v t a = 25 c r l = 1.0k ? c l = 50pf 100mv/div 50mv/div 1 s/div open loop voltage gain as a function of load resistance load resistance ( ? ) 1k 10k 1000k 100k 1000 100 10 1 open loop voltage gain (v/mv) v s = 5.0v t a = 25 c open loop voltage as a function of frequency frequency (hz) 1 10 100 1k 10k 1m 10m 100k 120 100 80 60 40 20 0 -20 open loop voltage gain (db) v s = 5.0v t a = 25 c 90 0 45 180 135 phase shift in degrees input offset voltage as a function of common mode input voltage common mode input voltage (v) -4 -2 0 +2 +4 +6 15 10 5 0 -5 -10 -15 input offset voltage (mv) v s = 5.0v t a = 25 c input offset voltage as a function of ambient temperature representative units ambient temperature ( c) input offset voltage (mv) -50 -25 0 +25 +50 +75 +100 +125 +4 +5 +3 +1 +2 0 -2 -1 -4 -3 -5 v s = 5.0v voltage noise density as a function of frequency frequency ( hz ) 10 100 1k 10k 100k 150 125 100 75 50 25 0 1000k voltage noise density (nv/ hz) v s = 5.0v t a = 25 c r l = 10k ? output voltage swing as a function of supply voltage supply voltage (v) output voltage swing (v) 3 0 1 2 3 4 5 6 7 r l = 2k ? 6 5 4 2 7 -55 c t a 125 c r l = 10k ?
ald1704a/ald1704b advanced linear devices 6 of 9 ald1704/ald1704g typical applications rail-to-rail voltage follower/buffer - + v in +10v c l r l 0.1 f z in = 10 12 ? ~ 400pf 1.5k ? v out 0 v in 10v rail-to-rail voltage comparator - + 50k 0.1 f 10m v in +12v +12v v out low offset summing amplifier input 1 input 2 - + +5v 0.1 f 0.1 f -5v gain = 5 c l = 4000pf * circuit drives large load capacitance 4000pf 10k 10k 50k v out photo detector current to voltage converter wien bridge oscillator (rail-to -rail) sine wave generator 10k - + 10k 10k +5v -5v .01 f 1 2 rc f = 1.6k hz c = .01 f r = 10k ~ = v out ~ low pass filter (rfi filter) r 1 = 10k c 1 = 100nf r 2 = 10k c 2 = 500pf + r f 100k 5k 5k 0.02 f r 1 r 1 c 1 +9v v in v out - low frequency breakpoint ?l = 2 r 1 c 1 = 160hz high frequency cutoff ?h = 2 r 2 c 2 = 32khz 1 1 + - +5v -5v r f = 5m i photodiode v out = i x r f r l 1.5k precision charge integrator + 1000pf 1m ? +5v -5v v in v out - bandpass network + +5v -5v c 1 r 1 c 2 r 2 v in v out - cutoff frequency = r 1 c 1 = 3.2khz gain = 10 frequency roll-off 20db/decade 1
ald1704a/ald1704b advanced linear devices 7 of 9 ald1704/ald1704g 8 pin plastic soic package soic-8 package drawing millimeters inches min max min max dim a a 1 b c d-8 e e h l s 1.75 0.25 0.45 0.25 5.00 4.05 6.30 0.937 8 0.50 0.053 0.004 0.014 0.007 0.185 0.140 0.224 0.024 0 0.010 0.069 0.010 0.018 0.010 0.196 0.160 0.248 0.037 8 0.020 1.27 bsc 0.050 bsc 1.35 0.10 0.35 0.18 4.69 3.50 5.70 0.60 0 0.25 ? l c h s (45 ) ? e a a 1 b d s (45 ) e
ald1704a/ald1704b advanced linear devices 8 of 9 ald1704/ald1704g 8 pin plastic dip package pdip-8 package drawing b 1 s b e e 1 d e a 2 a 1 a l c e 1 ? millimeters inches min max min max dim a a 1 a 2 b b 1 c d-8 e e 1 e e 1 l s-8 ? 3.81 0.38 1.27 0.89 0.38 0.20 9.40 5.59 7.62 2.29 7.37 2.79 1.02 0 5.08 1.27 2.03 1.65 0.51 0.30 11.68 7.11 8.26 2.79 7.87 3.81 2.03 15 0.105 0.015 0.050 0.035 0.015 0.008 0.370 0.220 0.300 0.090 0.290 0.110 0.040 0 0.200 0.050 0.080 0.065 0.020 0.012 0.460 0.280 0.325 0.110 0.310 0.150 0.080 15
ald1704a/ald1704b advanced linear devices 9 of 9 ald1704/ald1704g 8 pin cerdip package cerdip-8 package drawing a a 1 b b 1 c d-8 e e 1 e e 1 l l 1 l 2 s ? 3.55 1.27 0.97 0.36 0.20 -- 5.59 7.73 3.81 3.18 0.38 -- 0 5.08 2.16 1.65 0.58 0.38 10.29 7.87 8.26 5.08 -- 1.78 2.49 15 millimeters inches min max min max dim 0.140 0.050 0.038 0.014 0.008 -- 0.220 0.290 0.150 0.125 0.015 -- 0 0.200 0.085 0.065 0.023 0.015 0.405 0.310 0.325 0.200 -- 0.070 0.098 15 2.54 bsc 7.62 bsc 0.100 bsc 0.300 bsc e e 1 c e 1 ? s b l d b 1 e a l 2 a 1 l 1
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